1. Technical Field
The present invention relates generally to the fabrication of semiconductor devices and, more specifically, to a photoresist material having both negative and positive characteristics so that the processing windows are wider.
2. Background Art
Manufacturing of semiconductor devices is dependent upon the accurate replication of computer aided design (CAD) generated patterns onto the surface of a device substrate. The replication process is typically performed using lithographic processes followed by a variety of subtractive (etch) and additive (deposition) processes.
Photolithography, a type of lithographic process, is used in the manufacturing of semiconductor devices, integrated optics, and photomasks. The process basically comprises: applying a layer of a material that will react when exposed to actinic energy, known as a photoresist or, simply, a resist; selectively exposing portions of the photoresist to light or other ionizing radiation, i.e., ultraviolet, electron beams, X-rays, etc., thereby changing the solubility of portions of the resist; and developing the resist by washing it with a basic developer solution, such as tetramethylammonium hydroxide (xe2x80x9cTMAHxe2x80x9d), thereby removing the non-irradiated (in a negative resist) or irradiated (in a positive resist) portions of the layer.
As the need for higher and higher levels of integration has arisen in the industry, the need for a larger number of lines and spaces in a given area has increased dramatically. In response, the scaling of lithographic features has been an essential aspect of enhancing the performance and density of semiconductor devices. Lithographic scaling has been achieved primarily by three methods: increasing the numerical aperture (NA) of the expose tool; reducing the exposure wavelength; and improving the response of the photoresist. These three parameters are expressed in the Rayleigh model for lithographic resolution, as given by the equation:
R=kxcex/NA
where R is the resolution, k is an empirically derived parameter that is dependent on photoresist performance, xcex is the expose wavelength, and NA is the numerical aperture of the expose tool.
The xe2x80x9ckxe2x80x9d factor is reduced by resists that can provide a wider focus/expose process window for a high resolution feature. Historically, this xe2x80x9ckxe2x80x9d factor has been reduced by altering the resist components for example: by adding resins and sensitizers with higher contrast; employing thinner resist films; and using anti-reflective films. The reduction of the xe2x80x9ckxe2x80x9d factor is becoming more important because NA values are reaching their limit at 0.65-0.70 and since work at reducing the expose wavelength from the state-of-the art of 248 nm is still in preliminary stages.
Therefore, there is a desire for a photoresist material that overcomes one or more of the aforementioned shortcomings.
The present invention performs the functions of the usual photoresist, be it negative or positive, with less sensitivity to process conditions, i.e., a reduced xe2x80x9ckxe2x80x9d factor, allowing a wider range of conditions, such as exposure dose, while still maintaining the dimensions within allowable limits. Conversely, for a given process latitude, the smallest feature that can be resolved in the resolution of the resist can also be improved by using the concepts embodied in the present invention. These functions are performed by utilizing a photoresist substance that includes not only the traditional negative photoresist, but also xe2x80x9cdopingxe2x80x9d the negative resist material with a proportion of a positive resist material. In a like manner, a positive tone photoresist material may be xe2x80x9cdopedxe2x80x9d with an amount of a negative resist material.
It is an advantage of the present invention that the exposure latitude may be increased significantly, providing better control of feature size at all levels: lot-to-lot; wafer-to-wafer; within wafer; and within chip. This greater level of feature control may in turn either give rise to a higher yield of product at a particular feature size because errors are not as harmful to overall device fabrication or the feature size may be shrunk while still maintaining line width control thus gaining greater performance and density.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention.